Maxim Integrated Products showcases energy-measurement designs featuring Maxim's home energy measurement and G3-PLC powerline data communications for the smart grid.
Hosted by: Joe Desposito Edited by: Curtis Ellzey
Joe Desposito talks with Simon Abel of Crane Aerospace and Electronics about their new MFP point-of-load Converter and the plans for the power solution system. Hosted by: Joe Desposito Videography by: Paul Milnamow Edited by: Terry Knight
Joe Desposito talks with Fred Dart about the new Vinculo platform from FTDI Chip that engineers as well as hobbyists will find very affordable. Hosted by: Joe Desposito Videography by: Paul Milnamow Edited by: Terry Knight
EoPlex QFN Multi Row (QFN-MR) Molded Array Package Substrate platform technology is a clean additive process that uses proprietary deposition techniques and materials to produce ceramic-metal or metal-polymer components, such as cell phone antennas and the micro semiconductor packages.
Hosted by: Don Tuite Videography by: EoPlex Edited by: EoPlex
Joe Desposito talks with Ted Tewksbury, Ph.D of Integrated Device Technology about their philosophy, their current business and the future direction of the company. Hosted by: Joe Desposito Videography by: Paul Milnamow Edited by: Terry Knight
Paul Whytock talks with Ted Tewksbury, Ph.D of Integrated Device Technology about his companies technology trends as they look toward the future of the mobile connected world. Hosted by: Joe Desposito Videography by: Paul Milnamow Edited by: Terry Knight
TI has once again raised the power and performance bar by offering a multicore device with 10 GHz of cumulative performance in its new generation of TMS320CC66x DSPs. The C66x devices are built with multiple 1.25 GHz DSP cores and deliver combined fixed and floating point performance on a single device. Translating to 320 GMACs and 160 GFLOPs per chip, and with versions running under 10 Watts, this provides performance and power efficiency unparalleled in today�s market. With multiple device options, infrastructure system developers can now more easily design integrated, software upgradeable, power and cost-efficient platforms in markets such as mission critical, including public safety and defense, medical and high-end imaging, test and automation, high-performance computing and core networking.
Operators are challenged to cost effectively keep ahead of the data deluge without compromising quality of service. 4G is needed because its packet-based nature gives operators a technological advantage in delivering data. TI addresses the challenges of 4G with its new TMS320TCI6616 System on Chip. This SoC combines unmatched DSP multicore performance with dedicated hardware coprocessors, all based on TI�s KeyStone multicore architecture specifically designed for efficient data movement. The TCI6616 is based on TI�s new TMS320C66x DSPs and delivers more than double the performance of any 3G/4G SoC in the market. The TCI6616 also boasts the industry�s first multicore DSP that processes both fixed and floating point math, an innovative capability that simplifies wireless base station software design.
TI�s new KeyStone multicore architecture is truly a game changer, providing the highest MIPS with the lowest power for multicore DSPs in the industry. KeyStone is based on TI�s new TMS320C66x multicore DSPs that integrate fixed and floating point capabilities in the industry�s highest performing CPU. The new architecture provides the flexibility to include targeted coprocessing, fixed- and floating-point operations, optimized inter-element communications, and a variety of processor types. KeyStone incorporates DSP cores capable of both 32 GMACs per core for fixed-point operations and 16 GFLOPS for floating-point operations. This represents a performance boost that far exceeds the expectation of Moore�s Law in a single generation and also brings to market the first floating-point processor capable of operating at the highest DSP performance levels.
In a multicore SoC environment, memory efficiency is crucial for the system performance. TI�s KeyStone architecture offers a highly memory efficient architecture, which is critical for multicore system performance. KeyStone includes TI�s newest TMS320CC66x DSP core, which supports both fixed point and floating point operations. It doubles the data paths for load & store and multiplication and cross-paths. It also quadruples the register files to create 128-bit values. With upgraded instruction sets, the C66x DSP core is optimized for complex arithmetic and linear algebra and provides 4 times MAC capability over existing solutions. At the same time, it provides full binary compatibility with TI�s C64x+ and C674x+ DSPs.