In a multicore SoC environment, memory efficiency is crucial for the system performance. TI�s KeyStone architecture offers a highly memory efficient architecture, which is critical for multicore system performance. KeyStone includes TI�s newest TMS320CC66x DSP core, which supports both fixed point and floating point operations. It doubles the data paths for load & store and multiplication and cross-paths. It also quadruples the register files to create 128-bit values. With upgraded instruction sets, the C66x DSP core is optimized for complex arithmetic and linear algebra and provides 4 times MAC capability over existing solutions. At the same time, it provides full binary compatibility with TI�s C64x+ and C674x+ DSPs.

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